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 Prikl. Diskr. Mat., 2017, Number 38, Pages 66–88 (Mi pdm602)

Mathematical Backgrounds of Computer and Control System Reliability

Single fault detection tests for logic networks of AND, NOT gates

K. A. Popkov

Keldysh Institute of Applied Mathematics, Moscow, Russia

Abstract: Let $D_1(f)$ ($D_0(f)$) be the least length of a fault detection test for irredundant logic networks consisting of logic gates in the basis $\{&,\neg\}$, implementing a given Boolean function $f(x_1,\ldots,x_n)$, and having at most one stuck-at-1 (stuck-at-0 respectively) fault on outputs of the logic gates. Let $f_1=x_i$; $f_2=0, \overline{x_i}$, or $x_{i_1}^{\sigma_1}& x_{i_2}…& x_{i_k}$; $f_3=\overline{x_{i_1}}&\overline{x_{i_2}}& x_{i_3}&…& x_{i_k}$ or $\underbrace{(…((}_{k-1}x_{i_1}^{\sigma_1}& x_{i_2})^{\sigma_2}& x_{i_3})^{\sigma_3}&…& x_{i_k})^{\sigma_k}$; $f_4=x_{i_1}^{\sigma_1}&…& x_{i_k}^{\sigma_k}$; $f_5=\underbrace{(…((}_{k-1}x_{i_1}^{\sigma_1}& x_{i_2}^{\sigma_2})^{\delta_1}& x_{i_3}^{\sigma_3})^{\delta_2}&…& x_{i_k}^{\sigma_k})^{\delta_{k-1}}$, where $2\leqslant k\leqslant n$ for $f_2$, $f_3$, and $f_5$; $1\leqslant k\leqslant n$ for $f_4$; $\sigma_1,…,\sigma_k,\delta_1,…,\delta_{k-1}\in\{0,1\}$; $i,i_1,…,i_k\in\{1,…,n\}$; indices $i_1,…,i_k$ are pairwise different; for $f_3$, at least one of numbers $\sigma_2,…,\sigma_k$ equals $0$ and if $k=2$, then assume $x_{i_3}&…&x_{i_k}\equiv1$; for $f_5$, at least one of numbers $\delta_1,…,\delta_{k-1}$ equals $0$. It is proved that, for each Boolean function $f(x_1,…,x_n)\not\equiv1$,
$$D_1(f)=\begin{cases} 0,&iff the function f is representable in the form of f_1, 1,&iff the function f is representable in the form of f_2, 2,&iff the function f is representable in the form of f_3, 3&otherwise. \end{cases}$$
If $f\equiv1$ then the value $D_1(f)$ is undefined. Also, it is proved that, for each Boolean function $f(x_1,…,x_n)$ which is different from constants,
$$D_0(f)=\begin{cases} 0,&iff the function f is representable in the form of f_1, 1,&iff the function f is representable in the form of f_4 but not of f_1, 2,&iff the function f is representable in the form of f_5, 3&otherwise. \end{cases}$$
If $f\equiv1$ or $f\equiv0$ then the value $D_0(f)$ is undefined.

Keywords: logic network, stuck-at fault, single fault detection test.

 Funding Agency Grant Number Russian Science Foundation 14-21-00025 Ï

DOI: https://doi.org/10.17223/20710410/38/5

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UDC: 519.718.7

Citation: K. A. Popkov, “Single fault detection tests for logic networks of AND, NOT gates”, Prikl. Diskr. Mat., 2017, no. 38, 66–88

Citation in format AMSBIB
\Bibitem{Pop17} \by K.~A.~Popkov \paper Single fault detection tests for logic networks of AND, NOT gates \jour Prikl. Diskr. Mat. \yr 2017 \issue 38 \pages 66--88 \mathnet{http://mi.mathnet.ru/pdm602} \crossref{https://doi.org/10.17223/20710410/38/5} 

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This publication is cited in the following articles:
1. K. A. Popkov, “Short single tests for circuits with arbitrary stuck-at faults at outputs of gates”, Discrete Math. Appl., 29:5 (2019), 321–333
2. K. A. Popkov, “O skhemakh, dopuskayuschikh korotkie edinichnye proveryayuschie testy pri proizvolnykh neispravnostyakh funktsionalnykh elementov”, PDM, 2021, no. 51, 85–100
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