Probabilistic methods for self-correcting hardware design

This paper presents several ways for extending the scope of program self-correction methods, based on the “random self-reducibility” property, to hardware design. The concept can be utilized for both analog and digital hardware-design. The extension is based on sampling, polynomial-interpolation, and error-correcting codes. In particular, the authors suggest using the well-known reconstruction of real-numerical functions for correcting faults remaining in analog and digital hardware, e. g., arithmetic logic units (ALU), after manufacturing testing. The present approach can complement the state-of-the-art technique of program self-correction by uniformly testing samples of operations and verifying the results of these samples.