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Vestnik Moskovskogo Universiteta. Seriya 1. Matematika. Mekhanika, 2011, Number 5, Pages 48–51
(Mi vmumm720)
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This article is cited in 1 scientific paper (total in 1 paper)
Short notes
Minimal parallel prefix circuits
I. S. Sergeev Lomonosov Moscow State University, Faculty of Mechanics and Mathematics
Abstract:
The exact complexity of a minimal prefix circuit of width $m$ and depth $\lceil\log_2 m\rceil$ is obtained in the case when $m$ is a power of two. New upper bounds for the complexity of prefix circuits are obtained under various depth restrictions and separately for the circuits of XOR-gates.
Key words:
prefix circuits, complexity, depth.
Received: 19.09.2010
Citation:
I. S. Sergeev, “Minimal parallel prefix circuits”, Vestnik Moskov. Univ. Ser. 1. Mat. Mekh., 2011, no. 5, 48–51
Linking options:
https://www.mathnet.ru/eng/vmumm720 https://www.mathnet.ru/eng/vmumm/y2011/i5/p48
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